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Nonlinearity Correction of ADC by Iterative Application of Multi-Resistors Divider

Roman Kochan1, 2, Orest Kochan3, Zhengbing Hu4 and Jun Su5

1. Department of Computer Science and Automatics, University of Bielsko-Biala, Bielsko-Biala 43-300, Poland

2. Department of Specialized Computer Systems, Lviv Politechnic National University, Lviv 79013, Ukraine

3. Department of Information-Measuring Engineering, Lviv Politechnic National University, Lviv 79013, Ukraine

4. School of Educational Information Technology, Central China Normal University, Wuhan 430079, China

5. School of Computer Science, Hubei University of Technology, Hubei, China


Abstract: The method of testing point generation to correct the integral nonlinearity of high performance ADCs (analogue-to-digital converters) is developed and investigated in this paper. This method is based on averaging of voltages on all resistors of a multi-resistor voltage divider. It gives the opportunity to generate the set of testing points with the error equivalent to the error of a power source of the divider. The main idea of the proposed method is in comparison of results of an analog to digital conversion obtained on two different measuring intervals: the upper and the lower of intervals of an ADC under test for the same input voltages. The objective of this paper is in the investigation of the residual error of nonlinearity correction of the ADC under test for proposed method and its sensitivity to errors of the measurement circuit components. The technique of the investigation is based on a computer simulation of the measurement circuit with random settings of parameters of its components, acquisition and statistical processing of a large amount of the simulation data. There are presented dependence of the residual error on divider resistors’ errors and on the random error of the ADC under test.

Key words: ADC, integral nonlinearity, multi-resistor voltage divider, residual error.
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